Multi-Link ATX-300 Manuel d'utilisateur

1 TND359/D Rev 0, Jan-09 High-Efficiency 255 W ATX Power Supply Reference Design Documentation Package

10 4.3 Standby Power AC Input Output Current on +5VSB (A) Input Power (W) Specification 100 VAC / 50 HZ 0.147 0.36 115 VAC / 60 HZ 0.171 0.31 230

11 4.6 Output Transient Response (Dynamic Loading) Output Transient starting Load T1 / T2 (0.1 A/µsec), T1 / T2 (1 ms) Load (A) Voltage Max. (V) D

12 +5 V +3.3 V -12 V +5 VSB Figure 2: Dynamic Load Test Waveforms

13 4.8 Output Ripple / Noise The ripple voltage of each output is measured at no load and at the maximum load for each output., and at the four diff

14 No Load Full Load +5 V No Load Full Load +3.3 V No Load Full Load -12 V No Load Full Load +5 VsB Figure 3: 100 VAC / 50 HZ - Ripple / Noise T

15 4.8.2 115 VAC / 60 HZ - Ripple / Noise Test Waveform No Load Full Load +12 VA No Load Full Load +12 VB No Load Full Load +5 V No Load Full

16 No Load Full Load -12 V No Load Full Load +5 VSB Figure 4: 115 VAC / 60 HZ - Ripple / Noise Test Waveform

17 4.8.3 230 VAC / 50 HZ - Ripple / Noise Test Waveform No Load Full Load +12 VA No Load Full Load +12 VB No Load Full Load +5 V No Load Full

18 No Load Full Load -12 V No Load Full Load +5 VSB Figure 5: 230 VAC / 50 HZ - Ripple / Noise Test Waveform

19 4.8.3 240 VAC / 63 HZ - Ripple / Noise Test Waveform No Load Full Load +12 VA No Load Full Load +12 VB No Load Full Load +5 V No Load Full

2 © 2009 ON Semiconductor Disclaimer: ON Semiconductor is providing this reference design documentation package “AS IS” and the recipient assumes a

20 No Load Full Load -12 V No Load Full Load +5 VSB Figure 6: 240 VAC / 63 HZ - Ripple / Noise Test Waveform 4.9 Hold-up Time The required holdu

21 115 VAC 60HZ - 50% Load 230 VAC / 50 HZ - 50% Load Figure 7: Hold-up Time 4.10 Timing / Housekeeping / Control 4.10.1 AC On / Off Control

22 4.10.2 PS_ON On / Off Control PS_ON On / Off Test Parameter Description Rise Time 2 ms < T2 < 20 ms POK delay 100 ms < T3 < 500 m

23 4.10.4 PWR_OK CONTROL AND LOGIC SIGNALS RIPPLE/NOISE Measurement Max. Unit PWR_OK Full Load 35 400 mVP-P Table 15: PWR_OK Timings 4.10.5 PS_ON

24 4.11.3 Short Circuit Protection +12 VA +12 VB +5 V +3.3 V +5 VSB Figure 11: 115 VAC / 60 HZ DC Output Short circuit protection @ Full Loa

25 4.11.3 Over-Current Protection Over Current Protection DC Output Min. (A) Max. (A) Measurements (A) +12 VA 15 21 (< 240 VAC) 19.6 +12 VB 8

26 5. Evaluation Guidelines Evaluation of the reference design should be attempted only by persons who are intimately familiar with power conversio

27 Figure 13: ON Semiconductor’s 255 W Reference Design for ATX Power Supplies

28 6. Schematics The power supply is implemented using a single sided PCB board. Added flexibility is provided by using daughter cards for the PFC

ABCDDCBATitleNumber RevisionSizeA1Date: 11-Dec-2008 Sheet of File: D:\WORK\layout\MAINSTAY_F.K.ddb Drawn By:R81.8M(1%)C500.47uF1234Q1SPP15N60C3POWE

3 Table of Contents 1. Overview... 4 2. Specific

29 7. Parts List The bill of materials (BOM) for the design is provided in this section. To reflect the schematics shown in the previous section, th

30 1 T1 YC3501 L=0.63mH Ls=80uH MEIHUA 1 T2 EE25 MEIHUA 1 MOV TVR10471KSY TKS 1 IC10 NCP1027P065G DIP-8 ON 4 IC23, IC

31 1 R54 RES.SMD 47K 1% 0805 1 R55 RES.SMD 82.5K 1% 0805 1 R56 RES.SMD 12K 5% 0805 1 R57 RES.SMD 23.2K 5% 0805 2

32 QTY SYMBOL DESCRIPTION VENDOR VENDOR P/N DC-DC Converter Stage, Supervisory Stage (referred to as CTL2 in schematics of figure 14) 1 C220

33 1 C251 CAP.MON 0.47uF 16V X7R 0805 2 D100, D103 ES1D 1A 200V SMA TSC 2 D101, D102 DIO.SB SR24 2A 40V SMA PANJIT 6 D104, D

34 P/N QTY SYMBOL DESCRIPTION VENDOR VENDOR P/N HB Resonant LLC-Stage (referred to as CTL1 in schematics of figure 14 ) 1 C58 CAP.ELE 4.7

35 QTY SYMBOL DESCRIPTION VENDOR VENDOR P/N Mechanical and Miscellaneous Items 1 SW1 0-1 4P 10A Look SW SWEETA SS21-BBIWG-R 1 SW-INLET UL

36 8. Resources/Contact Information Data sheets, applications information and samples for the ON Semiconductor components are available at www.onse

4 1. Overview ON Semiconductor was the first semiconductor company to provide an 80 PLUS-certified open reference design for an ATX power supply i

5 As seen in figure 1, the first stage, active Power Factor Correction (PFC) stage, is built around ON Semiconductor’s Continuous Conduction Mode (C

6 Key specifications for this reference design are included in Table below. Input DC Output Current Voltage (Vac) Frequency (HZ) Output Voltage

7 3. Architecture Overview The architecture selected is designed around a succession of conversion stages as illustrated in Figure 1. The first stag

8 3.4 Secondary Side: DC-DC Conversion Stage Two identical DC-DC controllers are used to down-convert the 12 V into +5 V and +3.3 V. The DC-DC contr

9 4. Performance Results Measurements are done at three loading conditions, the load being expressed as a % of the rated output power, i.e. at 20%,